IEEE 421.5-2005 type ST7B model. This model is representative of static potential-source excitation systems. In this system, the AVR consists of a PI voltage regulator. A phase lead-lag filter in series allows the introduction of a derivative function, typically used with brushless excitation systems. In that case, the regulator is of the PID type. In addition, the terminal voltage channel includes a phase lead-lag filter. The AVR includes the appropriate inputs on its reference for overexcitation limiter (OEL1), underexcitation limiter (UEL), stator current limiter (SCL), and current compensator (DROOP). All these limitations, when they work at voltage reference level, keep the PSS (VS signal from PSS) in operation. However, the UEL limitation can also be transferred to the high value (HV) gate acting on the output signal. In addition, the output signal passes through a low value (LV) gate for a ceiling overexcitation limiter (OEL2). Reference: IEEE 421.5-2005, 7.7.
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static void | addConstructToMap (std::unordered_map< std::string, BaseClass *(*)()> &factory_map) |
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static void | addPrimitiveAssignFnsToMap (std::unordered_map< std::string, assign_function > &assign_map) |
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static void | addClassAssignFnsToMap (std::unordered_map< std::string, class_assign_function > &assign_map) |
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static const BaseClassDefiner | declare () |
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static void | addConstructToMap (std::unordered_map< std::string, BaseClass *(*)()> &factory_map) |
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static void | addPrimitiveAssignFnsToMap (std::unordered_map< std::string, assign_function > &assign_map) |
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static void | addClassAssignFnsToMap (std::unordered_map< std::string, class_assign_function > &assign_map) |
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static const BaseClassDefiner | declare () |
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static void | addConstructToMap (std::unordered_map< std::string, BaseClass *(*)()> &factory_map) |
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static void | addPrimitiveAssignFnsToMap (std::unordered_map< std::string, assign_function > &assign_map) |
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static void | addClassAssignFnsToMap (std::unordered_map< std::string, class_assign_function > &assign_map) |
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static const BaseClassDefiner | declare () |
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static void | addConstructToMap (std::unordered_map< std::string, BaseClass *(*)()> &factory_map) |
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static void | addPrimitiveAssignFnsToMap (std::unordered_map< std::string, assign_function > &assign_map) |
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static void | addClassAssignFnsToMap (std::unordered_map< std::string, class_assign_function > &assign_map) |
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static const BaseClassDefiner | declare () |
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static void | addConstructToMap (std::unordered_map< std::string, BaseClass *(*)()> &factory_map) |
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static void | addPrimitiveAssignFnsToMap (std::unordered_map< std::string, assign_function > &assign_map) |
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static void | addClassAssignFnsToMap (std::unordered_map< std::string, class_assign_function > &assign_map) |
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static const CIMPP::BaseClassDefiner | declare () |
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CIMPP::PU | kh |
| | High-value gate feedback gain (KH) (>= 0). Typical value = 1. Default: 0.0.
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CIMPP::PU | kia |
| | Voltage regulator integral gain (KIA) (>= 0). Typical value = 1. Default: 0.0.
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CIMPP::PU | kl |
| | Low-value gate feedback gain (KL) (>= 0). Typical value = 1. Default: 0.0.
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CIMPP::PU | kpa |
| | Voltage regulator proportional gain (KPA) (> 0). Typical value = 40. Default: 0.0.
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CIMPP::ExcST7BOELselectorKind | oelin |
| | OEL input selector (OELin). Typical value = noOELinput. Default: 0.
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CIMPP::Seconds | tb |
| | Regulator lag time constant (TB) (>= 0). Typical value = 1. Default: 0.0.
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CIMPP::Seconds | tc |
| | Regulator lead time constant (TC) (>= 0). Typical value = 1. Default: 0.0.
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CIMPP::Seconds | tf |
| | Excitation control system stabilizer time constant (TF) (>= 0). Typical value = 1. Default: 0.0.
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CIMPP::Seconds | tg |
| | Feedback time constant of inner loop field voltage regulator (TG) (>= 0). Typical value = 1. Default: 0.0.
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CIMPP::Seconds | tia |
| | Feedback time constant (TIA) (>= 0). Typical value = 3. Default: 0.0.
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CIMPP::ExcST7BUELselectorKind | uelin |
| | UEL input selector (UELin). Typical value = noUELinput. Default: 0.
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CIMPP::PU | vmax |
| | Maximum voltage reference signal (VMAX) (> 0 and > ExcIEEEST7B.vmin). Typical value = 1,1. Default: 0.0.
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CIMPP::PU | vmin |
| | Minimum voltage reference signal (VMIN) (> 0 and < ExcIEEEST7B.vmax). Typical value = 0,9. Default: 0.0.
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CIMPP::PU | vrmax |
| | Maximum voltage regulator output (VRMAX) (> 0). Typical value = 5. Default: 0.0.
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CIMPP::PU | vrmin |
| | Minimum voltage regulator output (VRMIN) (< 0). Typical value = -4,5. Default: 0.0.
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CIMPP::DiscontinuousExcitationControlDynamics * | DiscontinuousExcitationControlDynamics |
| | Discontinuous excitation control model associated with this excitation system model. Default: nullptr.
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CIMPP::OverexcitationLimiterDynamics * | OverexcitationLimiterDynamics |
| | Overexcitation limiter model associated with this excitation system model. Default: nullptr.
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CIMPP::PFVArControllerType1Dynamics * | PFVArControllerType1Dynamics |
| | Power factor or VAr controller type 1 model associated with this excitation system model. Default: nullptr.
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CIMPP::PFVArControllerType2Dynamics * | PFVArControllerType2Dynamics |
| | Power factor or VAr controller type 2 model associated with this excitation system model. Default: nullptr.
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CIMPP::PowerSystemStabilizerDynamics * | PowerSystemStabilizerDynamics |
| | Power system stabilizer model associated with this excitation system model. Default: nullptr.
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CIMPP::SynchronousMachineDynamics * | SynchronousMachineDynamics |
| | Synchronous machine model with which this excitation system model is associated. Default: nullptr.
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CIMPP::UnderexcitationLimiterDynamics * | UnderexcitationLimiterDynamics |
| | Undrexcitation limiter model associated with this excitation system model. Default: nullptr.
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CIMPP::VoltageCompensatorDynamics * | VoltageCompensatorDynamics |
| | Voltage compensator model associated with this excitation system model. Default: nullptr.
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CIMPP::Boolean | enabled |
| | Function block used indicator. true = use of function block is enabled false = use of function block is disabled. Default: false.
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std::list< CIMPP::DiagramObject * > | DiagramObjects |
| | The diagram objects that are associated with the domain object. Default: {}.
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CIMPP::String | description |
| | The description is a free human readable text describing or naming the object. It may be non unique and may not correlate to a naming hierarchy. Default: "".
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CIMPP::String | energyIdentCodeEic |
| | The attribute is used for an exchange of the EIC code (Energy identification Code). The length of the string is 16 characters as defined by the EIC code. For details on EIC scheme please refer to ENTSO-E web site. Default: "".
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CIMPP::String | mRID |
| | Master resource identifier issued by a model authority. The mRID is unique within an exchange context. Global uniqueness is easily achieved by using a UUID, as specified in RFC 4122, for the mRID. The use of UUID is strongly recommended. For CIMXML data files in RDF syntax conforming to IEC 61970-552, the mRID is mapped to rdf:ID or rdf:about attributes that identify CIM object elements. Default: "".
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CIMPP::String | name |
| | The name is any free human readable and possibly non unique text naming the object. Default: "".
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CIMPP::String | shortName |
| | The attribute is used for an exchange of a human readable short name with length of the string 12 characters maximum. Default: "".
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IEEE 421.5-2005 type ST7B model. This model is representative of static potential-source excitation systems. In this system, the AVR consists of a PI voltage regulator. A phase lead-lag filter in series allows the introduction of a derivative function, typically used with brushless excitation systems. In that case, the regulator is of the PID type. In addition, the terminal voltage channel includes a phase lead-lag filter. The AVR includes the appropriate inputs on its reference for overexcitation limiter (OEL1), underexcitation limiter (UEL), stator current limiter (SCL), and current compensator (DROOP). All these limitations, when they work at voltage reference level, keep the PSS (VS signal from PSS) in operation. However, the UEL limitation can also be transferred to the high value (HV) gate acting on the output signal. In addition, the output signal passes through a low value (LV) gate for a ceiling overexcitation limiter (OEL2). Reference: IEEE 421.5-2005, 7.7.