DPsim
Loading...
Searching...
No Matches
SP_Ph1_PiLine.cpp
1/* Copyright 2017-2021 Institute for Automation of Complex Power Systems,
2 * EONERC, RWTH Aachen University
3 *
4 * This Source Code Form is subject to the terms of the Mozilla Public
5 * License, v. 2.0. If a copy of the MPL was not distributed with this
6 * file, You can obtain one at https://mozilla.org/MPL/2.0/.
7 *********************************************************************************/
8
9#include <dpsim-models/MathUtils.h>
10#include <dpsim-models/SP/SP_Ph1_PiLine.h>
11
12using namespace CPS;
13
14SP::Ph1::PiLine::PiLine(String uid, String name, Logger::Level logLevel)
15 : Base::Ph1::PiLine(mAttributes),
16 CompositePowerComp<Complex>(uid, name, false, true, logLevel),
17 mCurrent(mAttributes->create<MatrixComp>("current_vector")),
18 mActivePowerBranch(mAttributes->create<Matrix>("p_branch_vector")),
19 mReactivePowerBranch(mAttributes->create<Matrix>("q_branch_vector")),
20 mActivePowerInjection(mAttributes->create<Real>("p_inj")),
21 mReactivePowerInjection(mAttributes->create<Real>("q_inj")) {
22
23 SPDLOG_LOGGER_INFO(mSLog, "Create {} {}", this->type(), name);
24 mSLog->flush();
25
26 setVirtualNodeNumber(1);
27 setTerminalNumber(2);
28 **mIntfVoltage = MatrixComp::Zero(1, 1);
29 **mIntfCurrent = MatrixComp::Zero(1, 1);
30 **mCurrent = MatrixComp::Zero(2, 1);
31 **mActivePowerBranch = Matrix::Zero(2, 1);
32 **mReactivePowerBranch = Matrix::Zero(2, 1);
33}
34
35void SP::Ph1::PiLine::setParameters(Real resistance, Real inductance,
36 Real capacitance, Real conductance) {
37
38 **mSeriesRes = resistance;
39 **mSeriesInd = inductance;
40 SPDLOG_LOGGER_INFO(mSLog, "Resistance={} [Ohm] Inductance={} [H]",
41 **mSeriesRes, **mSeriesInd);
42
43 if (capacitance > 0) {
44 **mParallelCap = capacitance;
45 mParallelCapIsFallback = false;
46 } else {
47 **mParallelCap = 1e-12;
48 mParallelCapIsFallback = true;
49 SPDLOG_LOGGER_WARN(
50 mSLog, "Zero value for Capacitance, setting default value of C={} [F]",
51 **mParallelCap);
52 }
53 if (conductance > 0) {
54 **mParallelCond = conductance;
55 mParallelCondIsFallback = false;
56 } else {
57 if (mBehaviour == Behaviour::Initialization)
58 **mParallelCond =
59 (conductance >= 0)
60 ? conductance
61 : 1e-6; // init mode for initFromPowerFlow of mna system components
62 else
63 **mParallelCond = (conductance > 0) ? conductance : 1e-6;
64 mParallelCondIsFallback = true;
65 SPDLOG_LOGGER_WARN(
66 mSLog, "Zero value for Conductance, setting default value of G={} [S]",
67 **mParallelCond);
68 }
69 SPDLOG_LOGGER_INFO(mSLog, "Capacitance={} [F] Conductance={} [S]",
70 **mParallelCap, **mParallelCond);
71 mSLog->flush();
72 mParametersSet = true;
73}
74
76SimPowerComp<Complex>::Ptr SP::Ph1::PiLine::clone(String name) {
77 auto copy = PiLine::make(name, mLogLevel);
78 copy->setParameters(**mSeriesRes, **mSeriesInd, **mParallelCap,
80 return copy;
81}
82
83// #### Powerflow section ####
84Real SP::Ph1::PiLine::getBaseVoltage() const { return mBaseVoltage; }
85
86void SP::Ph1::PiLine::setBaseVoltage(Real baseVoltage) {
87 mBaseVoltage = baseVoltage;
88}
89
91 Real baseOmega) {
92 SPDLOG_LOGGER_INFO(mSLog, "#### Calculate Per Unit Parameters for {}",
93 **mName);
94 mBaseApparentPower = baseApparentPower;
95 mBaseOmega = baseOmega;
96 SPDLOG_LOGGER_INFO(mSLog, "Base Power={} [VA] Base Omega={} [1/s]",
97 baseApparentPower, baseOmega);
98
99 mBaseImpedance = (mBaseVoltage * mBaseVoltage) / mBaseApparentPower;
103 mBaseCurrent = baseApparentPower /
104 (mBaseVoltage *
105 sqrt(3)); // I_base=(S_threephase/3)/(V_line_to_line/sqrt(3))
106 SPDLOG_LOGGER_INFO(mSLog, "Base Voltage={} [V] Base Impedance={} [Ohm]",
107 mBaseVoltage, mBaseImpedance);
108
113
114 SPDLOG_LOGGER_INFO(mSLog, "Resistance={} [pu] Reactance={} [pu]",
116 SPDLOG_LOGGER_INFO(mSLog, "Susceptance={} [pu] Conductance={} [pu]",
118 mSLog->flush();
119}
120
122 int bus1 = this->matrixNodeIndex(0);
123 int bus2 = this->matrixNodeIndex(1);
124
125 // Exclude MNA-conditioning fallback shunt from standalone PF, keep it for Initialization
126 Real parallelCondPerUnit =
127 (mBehaviour == Behaviour::PFSimulation && mParallelCondIsFallback)
128 ? 0.
130 Real parallelCapPerUnit =
131 (mBehaviour == Behaviour::PFSimulation && mParallelCapIsFallback)
132 ? 0.
134
135 //create the element admittance matrix
136 Complex y =
137 Complex(1, 0) / Complex(mSeriesResPerUnit, 1. * mSeriesIndPerUnit);
138 Complex ys =
139 Complex(parallelCondPerUnit, 1. * parallelCapPerUnit) / Complex(2, 0);
140
141 //Fill the internal matrix
142 mY_element = MatrixComp(2, 2);
143 mY_element(0, 0) = y + ys;
144 mY_element(0, 1) = -y;
145 mY_element(1, 0) = -y;
146 mY_element(1, 1) = y + ys;
147
148 //check for inf or nan
149 for (int i = 0; i < 2; i++)
150 for (int j = 0; j < 2; j++)
151 if (!Math::isFinite(mY_element.coeff(i, j))) {
152 SPDLOG_LOGGER_ERROR(
153 mSLog,
154 "Line {}: non-finite per-unit admittance {} in element Y({},{})",
155 this->name(), Logger::complexToString(mY_element.coeff(i, j)), i,
156 j);
158 }
159
160 //set the circuit matrix values
161 Y.coeffRef(bus1, bus1) += mY_element.coeff(0, 0);
162 Y.coeffRef(bus1, bus2) += mY_element.coeff(0, 1);
163 Y.coeffRef(bus2, bus2) += mY_element.coeff(1, 1);
164 Y.coeffRef(bus2, bus1) += mY_element.coeff(1, 0);
165
166 SPDLOG_LOGGER_INFO(mSLog, "#### PF Y matrix stamping #### ");
167 SPDLOG_LOGGER_INFO(mSLog, "{}", mY_element);
168 mSLog->flush();
169}
170
171void SP::Ph1::PiLine::updateBranchFlow(VectorComp &current,
172 VectorComp &powerflow) {
173 **mCurrent = current * mBaseCurrent;
174 **mActivePowerBranch = powerflow.real() * mBaseApparentPower;
175 **mReactivePowerBranch = powerflow.imag() * mBaseApparentPower;
176}
177
178void SP::Ph1::PiLine::storeNodalInjection(Complex powerInjection) {
179 **mActivePowerInjection = std::real(powerInjection) * mBaseApparentPower;
180 **mReactivePowerInjection = std::imag(powerInjection) * mBaseApparentPower;
181}
182
183MatrixComp SP::Ph1::PiLine::Y_element() { return mY_element; }
184
186 if (mSubCompCreated)
187 return;
188 mSubCompCreated = true;
189
190 // By default there is always a small conductance to ground to
191 // avoid problems with floating nodes.
192 **mParallelCond = (**mParallelCond >= 0) ? **mParallelCond : 1e-6;
193
194 // Create series sub components
196 std::make_shared<SP::Ph1::Resistor>(**mName + "_res", mLogLevel);
197 mSubSeriesResistor->setParameters(**mSeriesRes);
198 mSubSeriesResistor->connect({mTerminals[0]->node(), mVirtualNodes[0]});
199 addMNASubComponent(mSubSeriesResistor, MNA_SUBCOMP_TASK_ORDER::NO_TASK,
200 MNA_SUBCOMP_TASK_ORDER::TASK_BEFORE_PARENT, false);
201
203 std::make_shared<SP::Ph1::Inductor>(**mName + "_ind", mLogLevel);
204 mSubSeriesInductor->setParameters(**mSeriesInd);
205 mSubSeriesInductor->connect({mVirtualNodes[0], mTerminals[1]->node()});
206 addMNASubComponent(mSubSeriesInductor, MNA_SUBCOMP_TASK_ORDER::NO_TASK,
207 MNA_SUBCOMP_TASK_ORDER::TASK_BEFORE_PARENT, true);
208
209 // Create parallel sub components
210 if (**mParallelCond >= 0) {
212 std::make_shared<SP::Ph1::Resistor>(**mName + "_con0", mLogLevel);
213 mSubParallelResistor0->setParameters(2. / **mParallelCond);
214 mSubParallelResistor0->connect(
215 SimNode::List{SimNode::GND, mTerminals[0]->node()});
216 addMNASubComponent(mSubParallelResistor0, MNA_SUBCOMP_TASK_ORDER::NO_TASK,
217 MNA_SUBCOMP_TASK_ORDER::TASK_BEFORE_PARENT, false);
218
220 std::make_shared<SP::Ph1::Resistor>(**mName + "_con1", mLogLevel);
221 mSubParallelResistor1->setParameters(2. / **mParallelCond);
222 mSubParallelResistor1->connect(
223 SimNode::List{SimNode::GND, mTerminals[1]->node()});
224 addMNASubComponent(mSubParallelResistor1, MNA_SUBCOMP_TASK_ORDER::NO_TASK,
225 MNA_SUBCOMP_TASK_ORDER::TASK_BEFORE_PARENT, false);
226 }
227
228 if (**mParallelCap > 0) {
229 mSubParallelCapacitor0 =
230 std::make_shared<SP::Ph1::Capacitor>(**mName + "_cap0", mLogLevel);
231 mSubParallelCapacitor0->setParameters(**mParallelCap / 2.);
232 mSubParallelCapacitor0->connect(
233 SimNode::List{SimNode::GND, mTerminals[0]->node()});
234 addMNASubComponent(mSubParallelCapacitor0, MNA_SUBCOMP_TASK_ORDER::NO_TASK,
235 MNA_SUBCOMP_TASK_ORDER::TASK_BEFORE_PARENT, true);
236
238 std::make_shared<SP::Ph1::Capacitor>(**mName + "_cap1", mLogLevel);
239 mSubParallelCapacitor1->setParameters(**mParallelCap / 2.);
240 mSubParallelCapacitor1->connect(
241 SimNode::List{SimNode::GND, mTerminals[1]->node()});
242 addMNASubComponent(mSubParallelCapacitor1, MNA_SUBCOMP_TASK_ORDER::NO_TASK,
243 MNA_SUBCOMP_TASK_ORDER::TASK_BEFORE_PARENT, true);
244 }
245}
246
248 // Static calculation
249 Real omega = 2. * PI * frequency;
250 Complex impedance = {**mSeriesRes, omega * **mSeriesInd};
251 (**mIntfVoltage)(0, 0) = initialSingleVoltage(1) - initialSingleVoltage(0);
252 (**mIntfCurrent)(0, 0) = (**mIntfVoltage)(0, 0) / impedance;
253
254 // Initialization of virtual node
255 mVirtualNodes[0]->setInitialVoltage(initialSingleVoltage(0) +
256 (**mIntfCurrent)(0, 0) * **mSeriesRes);
257
258 SPDLOG_LOGGER_INFO(
259 mSLog,
260 "\n--- Initialization from powerflow ---"
261 "\nVoltage across: {:s}"
262 "\nCurrent: {:s}"
263 "\nTerminal 0 voltage: {:s}"
264 "\nTerminal 1 voltage: {:s}"
265 "\nVirtual Node 1 voltage: {:s}"
266 "\n--- Initialization from powerflow finished ---",
267 Logger::phasorToString((**mIntfVoltage)(0, 0)),
268 Logger::phasorToString((**mIntfCurrent)(0, 0)),
269 Logger::phasorToString(initialSingleVoltage(0)),
270 Logger::phasorToString(initialSingleVoltage(1)),
271 Logger::phasorToString(mVirtualNodes[0]->initialSingleVoltage()));
272}
273
275 AttributeBase::List &prevStepDependencies,
276 AttributeBase::List &attributeDependencies,
277 AttributeBase::List &modifiedAttributes,
278 Attribute<Matrix>::Ptr &leftVector) {
279 attributeDependencies.push_back(leftVector);
280 modifiedAttributes.push_back(mIntfVoltage);
281 modifiedAttributes.push_back(mIntfCurrent);
282}
283
284void SP::Ph1::PiLine::mnaParentPostStep(Real time, Int timeStepCount,
285 Attribute<Matrix>::Ptr &leftVector) {
286 this->mnaUpdateVoltage(**leftVector);
287 this->mnaUpdateCurrent(**leftVector);
288}
289
290void SP::Ph1::PiLine::mnaCompUpdateVoltage(const Matrix &leftVector) {
291 (**mIntfVoltage)(0, 0) = 0;
292 if (terminalNotGrounded(1))
293 (**mIntfVoltage)(0, 0) =
294 Math::complexFromVectorElement(leftVector, matrixNodeIndex(1));
295 if (terminalNotGrounded(0))
296 (**mIntfVoltage)(0, 0) =
297 (**mIntfVoltage)(0, 0) -
298 Math::complexFromVectorElement(leftVector, matrixNodeIndex(0));
299}
300
301void SP::Ph1::PiLine::mnaCompUpdateCurrent(const Matrix &leftVector) {
302 (**mIntfCurrent)(0, 0) = mSubSeriesInductor->intfCurrent()(0, 0);
303}
304
305MNAInterface::List SP::Ph1::PiLine::mnaTearGroundComponents() {
306 MNAInterface::List gndComponents;
307
308 gndComponents.push_back(mSubParallelResistor0);
309 gndComponents.push_back(mSubParallelResistor1);
310
311 if (**mParallelCap > 0) {
312 gndComponents.push_back(mSubParallelCapacitor0);
313 gndComponents.push_back(mSubParallelCapacitor1);
314 }
315
316 return gndComponents;
317}
318
319void SP::Ph1::PiLine::mnaTearInitialize(Real omega, Real timeStep) {
320 mSubSeriesResistor->mnaTearSetIdx(mTearIdx);
321 mSubSeriesResistor->mnaTearInitialize(omega, timeStep);
322 mSubSeriesInductor->mnaTearSetIdx(mTearIdx);
323 mSubSeriesInductor->mnaTearInitialize(omega, timeStep);
324}
325
326void SP::Ph1::PiLine::mnaTearApplyMatrixStamp(SparseMatrixRow &tearMatrix) {
327 mSubSeriesResistor->mnaTearApplyMatrixStamp(tearMatrix);
328 mSubSeriesInductor->mnaTearApplyMatrixStamp(tearMatrix);
329}
330
331void SP::Ph1::PiLine::mnaTearApplyVoltageStamp(Matrix &voltageVector) {
332 mSubSeriesInductor->mnaTearApplyVoltageStamp(voltageVector);
333}
334
335void SP::Ph1::PiLine::mnaTearPostStep(Complex voltage, Complex current) {
336 mSubSeriesInductor->mnaTearPostStep(voltage - current * **mSeriesRes,
337 current);
338}
const Attribute< Real >::Ptr mParallelCap
Capacitance in parallel to the line [F].
const Attribute< Real >::Ptr mParallelCond
Conductance in parallel to the line [S].
const Attribute< Real >::Ptr mSeriesInd
Inductance along the line [H].
const Attribute< Real >::Ptr mSeriesRes
Resistance along the line [ohms].
void addMNASubComponent(typename SimPowerComp< Complex >::Ptr subc, MNA_SUBCOMP_TASK_ORDER preStepOrder, MNA_SUBCOMP_TASK_ORDER postStepOrder, Bool contributeToRightVector)
CompositePowerComp(String uid, String name, Bool hasPreStep, Bool hasPostStep, Logger::Level logLevel)
const Attribute< String >::Ptr mName
Human readable name.
String uid()
Returns unique id.
String type()
Get component type (cross-platform)
AttributeList::Ptr mAttributes
Attribute List.
void mnaUpdateCurrent(const Matrix &leftVector) final
void mnaUpdateVoltage(const Matrix &leftVector) final
void createSubComponents() override
Constructs and registers MNA subcomponents; idempotent.
void setBaseVoltage(Real baseVoltage)
Set base voltage.
Real mBaseCapacitance
base capacitance [F]
void calculatePerUnitParameters(Real baseApparentPower, Real baseOmega)
Calculates component's parameters in specified per-unit system.
std::shared_ptr< Resistor > mSubSeriesResistor
Series Resistor submodel.
const Attribute< Matrix >::Ptr mActivePowerBranch
branch active powerflow [W], coef(0) has data from node 0, coef(1) from node 1.
Real mSeriesIndPerUnit
Inductance of the line in [pu].
const Attribute< Real >::Ptr mReactivePowerInjection
nodal reactive power injection
const Attribute< MatrixComp >::Ptr mCurrent
branch Current flow [A], coef(0) has data from node 0, coef(1) from node 1.
Real mBaseAdmittance
base admittance [S]
Real mBaseInductance
base inductance [H]
Real mParallelCapPerUnit
Capacitance of the line in [pu].
std::shared_ptr< Resistor > mSubParallelResistor1
Parallel resistor submodel at Terminal 1.
const Attribute< Matrix >::Ptr mReactivePowerBranch
branch reactive powerflow [Var], coef(0) has data from node 0, coef(1) from node 1.
void mnaParentAddPostStepDependencies(AttributeBase::List &prevStepDependencies, AttributeBase::List &attributeDependencies, AttributeBase::List &modifiedAttributes, Attribute< Matrix >::Ptr &leftVector) override
add MNA post-step dependencies
void updateBranchFlow(VectorComp &current, VectorComp &powerflow)
updates branch current and power flow, input pu value, update with real value
void mnaParentPostStep(Real time, Int timeStepCount, Attribute< Matrix >::Ptr &leftVector) override
MNA post-step operations.
MatrixComp Y_element()
get admittance matrix
Real mSeriesResPerUnit
resistance in [pu]
std::shared_ptr< Resistor > mSubParallelResistor0
Parallel Resistor submodel at Terminal 0.
void initializeParentFromNodesAndTerminals(Real frequency) override
Derives values from power flow data and pushes them to subcomponents.
void pfApplyAdmittanceMatrixStamp(SparseMatrixCompRow &Y) override
Stamps admittance matrix.
void mnaCompUpdateCurrent(const Matrix &leftVector) override
Updates internal current variable of the component.
std::shared_ptr< Capacitor > mSubParallelCapacitor1
Parallel capacitor submodel at Terminal 1.
Real getBaseVoltage() const
Get base voltage.
PiLine(String uid, String name, Logger::Level logLevel=Logger::Level::off)
Defines UID, name and logging level.
SimPowerComp< Complex >::Ptr clone(String copySuffix) override
DEPRECATED: Delete method.
std::shared_ptr< Inductor > mSubSeriesInductor
Series Inductance submodel.
const Attribute< Real >::Ptr mActivePowerInjection
nodal active power injection
Real mParallelCondPerUnit
Conductance of the line in [pu].
Real mBaseApparentPower
base apparent power [VA]
Real mBaseImpedance
base impedance [Ohm]
void mnaCompUpdateVoltage(const Matrix &leftVector) override
Updates internal voltage variable of the component.
Real mBaseOmega
base omega [1/s]
void storeNodalInjection(Complex powerInjection)
stores nodal injection power in this line object
const Attribute< MatrixVar< Complex > >::Ptr mIntfCurrent
SimTerminal< Complex >::List mTerminals
const Attribute< MatrixVar< Complex > >::Ptr mIntfVoltage
SimNode< Complex >::List mVirtualNodes
Logger::Level mLogLevel
Component logger control for internal variables.
Logger::Log mSLog
Component logger.