39 Matrix defaultParallelCond = Matrix::Zero(3, 3);
40 defaultParallelCond << 1e-6, 0, 0, 0, 1e-6, 0, 0, 0, 1e-6;
42 ((**mParallelCond)(0, 0) > 0) ? **
mParallelCond : defaultParallelCond;
45 Real omega = 2. * PI * frequency;
46 MatrixComp impedance = MatrixComp::Zero(3, 3);
57 MatrixComp vInitABC = MatrixComp::Zero(3, 1);
58 vInitABC(0, 0) = RMS3PH_TO_PEAK1PH * initialSingleVoltage(1) -
59 RMS3PH_TO_PEAK1PH * initialSingleVoltage(0);
60 vInitABC(1, 0) = vInitABC(0, 0) * SHIFT_TO_PHASE_B;
61 vInitABC(2, 0) = vInitABC(0, 0) * SHIFT_TO_PHASE_C;
62 MatrixComp iInit = impedance.inverse() * vInitABC;
68 MatrixComp vInitTerm0 = MatrixComp::Zero(3, 1);
69 vInitTerm0(0, 0) = RMS3PH_TO_PEAK1PH * initialSingleVoltage(0);
70 vInitTerm0(1, 0) = vInitTerm0(0, 0) * SHIFT_TO_PHASE_B;
71 vInitTerm0(2, 0) = vInitTerm0(0, 0) * SHIFT_TO_PHASE_C;
84 MNA_SUBCOMP_TASK_ORDER::TASK_BEFORE_PARENT,
85 MNA_SUBCOMP_TASK_ORDER::TASK_BEFORE_PARENT,
false);
94 MNA_SUBCOMP_TASK_ORDER::TASK_BEFORE_PARENT,
95 MNA_SUBCOMP_TASK_ORDER::TASK_BEFORE_PARENT,
true);
99 std::make_shared<EMT::Ph3::Resistor>(**
mName +
"_con0",
mLogLevel);
102 SimNode::List{SimNode::GND,
mTerminals[0]->node()});
106 MNA_SUBCOMP_TASK_ORDER::TASK_BEFORE_PARENT,
107 MNA_SUBCOMP_TASK_ORDER::TASK_BEFORE_PARENT,
false);
110 std::make_shared<EMT::Ph3::Resistor>(**
mName +
"_con1",
mLogLevel);
113 SimNode::List{SimNode::GND,
mTerminals[1]->node()});
117 MNA_SUBCOMP_TASK_ORDER::TASK_BEFORE_PARENT,
118 MNA_SUBCOMP_TASK_ORDER::TASK_BEFORE_PARENT,
false);
121 mSubParallelCapacitor0 =
122 std::make_shared<EMT::Ph3::Capacitor>(**
mName +
"_cap0",
mLogLevel);
123 mSubParallelCapacitor0->setParameters(**
mParallelCap / 2.);
124 mSubParallelCapacitor0->connect(
125 SimNode::List{SimNode::GND,
mTerminals[0]->node()});
127 mSubParallelCapacitor0->initializeFromNodesAndTerminals(frequency);
129 MNA_SUBCOMP_TASK_ORDER::TASK_BEFORE_PARENT,
130 MNA_SUBCOMP_TASK_ORDER::TASK_BEFORE_PARENT,
true);
132 mSubParallelCapacitor1 =
133 std::make_shared<EMT::Ph3::Capacitor>(**
mName +
"_cap1",
mLogLevel);
134 mSubParallelCapacitor1->setParameters(**
mParallelCap / 2.);
135 mSubParallelCapacitor1->connect(
136 SimNode::List{SimNode::GND,
mTerminals[1]->node()});
138 mSubParallelCapacitor1->initializeFromNodesAndTerminals(frequency);
140 MNA_SUBCOMP_TASK_ORDER::TASK_BEFORE_PARENT,
141 MNA_SUBCOMP_TASK_ORDER::TASK_BEFORE_PARENT,
true);
144 SPDLOG_LOGGER_DEBUG(
mSLog,
153 Logger::matrixCompToString(impedance),
154 Logger::matrixCompToString(vInitABC),
155 Logger::matrixCompToString(iInit));
159 "\n--- Initialization from powerflow ---"
160 "\nVoltage across: {:s}"
162 "\nTerminal 0 voltage: {:s}"
163 "\nTerminal 1 voltage: {:s}"
164 "\nVirtual Node 1 voltage: {:s}"
165 "\n--- Initialization from powerflow finished ---",
168 Logger::phasorToString(RMS3PH_TO_PEAK1PH * initialSingleVoltage(0)),
169 Logger::phasorToString(RMS3PH_TO_PEAK1PH * initialSingleVoltage(1)),
170 Logger::phasorToString(
mVirtualNodes[0]->initialSingleVoltage()));
206 if (terminalNotGrounded(1)) {
207 (**mIntfVoltage)(0, 0) =
208 Math::realFromVectorElement(leftVector, matrixNodeIndex(1, 0));
209 (**mIntfVoltage)(1, 0) =
210 Math::realFromVectorElement(leftVector, matrixNodeIndex(1, 1));
211 (**mIntfVoltage)(2, 0) =
212 Math::realFromVectorElement(leftVector, matrixNodeIndex(1, 2));
214 if (terminalNotGrounded(0)) {
215 (**mIntfVoltage)(0, 0) =
217 Math::realFromVectorElement(leftVector, matrixNodeIndex(0, 0));
218 (**mIntfVoltage)(1, 0) =
220 Math::realFromVectorElement(leftVector, matrixNodeIndex(0, 1));
221 (**mIntfVoltage)(2, 0) =
223 Math::realFromVectorElement(leftVector, matrixNodeIndex(0, 2));