9#include <dpsim-models/DP/DP_Ph1_PiLine.h>
16 setVirtualNodeNumber(1);
19 SPDLOG_LOGGER_INFO(
mSLog,
"Create {} {}", this->
type(), name);
26 auto copy = PiLine::make(name,
mLogLevel);
35 Real omega = 2. * PI * frequency;
37 (**mIntfVoltage)(0, 0) = initialSingleVoltage(1) - initialSingleVoltage(0);
38 (**mIntfCurrent)(0, 0) = (**
mIntfVoltage)(0, 0) / impedance;
52 MNA_SUBCOMP_TASK_ORDER::TASK_BEFORE_PARENT,
53 MNA_SUBCOMP_TASK_ORDER::TASK_BEFORE_PARENT,
false);
62 MNA_SUBCOMP_TASK_ORDER::TASK_BEFORE_PARENT,
63 MNA_SUBCOMP_TASK_ORDER::TASK_BEFORE_PARENT,
true);
67 Real defaultParallelCond = 1e-6;
76 SimNode::List{SimNode::GND,
mTerminals[0]->node()});
80 MNA_SUBCOMP_TASK_ORDER::TASK_BEFORE_PARENT,
81 MNA_SUBCOMP_TASK_ORDER::TASK_BEFORE_PARENT,
false);
87 SimNode::List{SimNode::GND,
mTerminals[1]->node()});
91 MNA_SUBCOMP_TASK_ORDER::TASK_BEFORE_PARENT,
92 MNA_SUBCOMP_TASK_ORDER::TASK_BEFORE_PARENT,
false);
95 mSubParallelCapacitor0 =
96 std::make_shared<DP::Ph1::Capacitor>(**
mName +
"_cap0",
mLogLevel);
97 mSubParallelCapacitor0->setParameters(**
mParallelCap / 2.);
98 mSubParallelCapacitor0->connect(
99 SimNode::List{SimNode::GND,
mTerminals[0]->node()});
101 mSubParallelCapacitor0->initializeFromNodesAndTerminals(frequency);
103 MNA_SUBCOMP_TASK_ORDER::TASK_BEFORE_PARENT,
104 MNA_SUBCOMP_TASK_ORDER::TASK_BEFORE_PARENT,
true);
107 std::make_shared<DP::Ph1::Capacitor>(**
mName +
"_cap1",
mLogLevel);
110 SimNode::List{SimNode::GND,
mTerminals[1]->node()});
114 MNA_SUBCOMP_TASK_ORDER::TASK_BEFORE_PARENT,
115 MNA_SUBCOMP_TASK_ORDER::TASK_BEFORE_PARENT,
true);
120 "\n--- Initialization from powerflow ---"
121 "\nVoltage across: {:s}"
123 "\nTerminal 0 voltage: {:s}"
124 "\nTerminal 1 voltage: {:s}"
125 "\nVirtual Node 1 voltage: {:s}"
126 "\n--- Initialization from powerflow finished ---",
129 Logger::phasorToString(initialSingleVoltage(0)),
130 Logger::phasorToString(initialSingleVoltage(1)),
131 Logger::phasorToString(
mVirtualNodes[0]->initialSingleVoltage()));
135 AttributeBase::List &prevStepDependencies,
136 AttributeBase::List &attributeDependencies,
137 AttributeBase::List &modifiedAttributes) {
149void DP::Ph1::PiLine::mnaParentAddPostStepDependencies(
150 AttributeBase::List &prevStepDependencies,
151 AttributeBase::List &attributeDependencies,
152 AttributeBase::List &modifiedAttributes,
153 Attribute<Matrix>::Ptr &leftVector) {
155 attributeDependencies.push_back(leftVector);
156 modifiedAttributes.push_back(mIntfVoltage);
157 modifiedAttributes.push_back(mIntfCurrent);
160void DP::Ph1::PiLine::mnaParentPostStep(Real time, Int timeStepCount,
161 Attribute<Matrix>::Ptr &leftVector) {
163 this->mnaUpdateVoltage(**leftVector);
164 this->mnaUpdateCurrent(**leftVector);
168 (**mIntfVoltage)(0, 0) = 0;
169 if (terminalNotGrounded(1))
170 (**mIntfVoltage)(0, 0) =
171 Math::complexFromVectorElement(leftVector, matrixNodeIndex(1));
172 if (terminalNotGrounded(0))
173 (**mIntfVoltage)(0, 0) =
175 Math::complexFromVectorElement(leftVector, matrixNodeIndex(0));
182MNAInterface::List DP::Ph1::PiLine::mnaTearGroundComponents() {
183 MNAInterface::List gndComponents;
185 gndComponents.push_back(mSubParallelResistor0);
186 gndComponents.push_back(mSubParallelResistor1);
188 if (**mParallelCap >= 0) {
189 gndComponents.push_back(mSubParallelCapacitor0);
190 gndComponents.push_back(mSubParallelCapacitor1);
193 return gndComponents;
196void DP::Ph1::PiLine::mnaTearInitialize(Real omega, Real timeStep) {
197 mSubSeriesResistor->mnaTearSetIdx(mTearIdx);
198 mSubSeriesResistor->mnaTearInitialize(omega, timeStep);
199 mSubSeriesInductor->mnaTearSetIdx(mTearIdx);
200 mSubSeriesInductor->mnaTearInitialize(omega, timeStep);
203void DP::Ph1::PiLine::mnaTearApplyMatrixStamp(SparseMatrixRow &tearMatrix) {
204 mSubSeriesResistor->mnaTearApplyMatrixStamp(tearMatrix);
205 mSubSeriesInductor->mnaTearApplyMatrixStamp(tearMatrix);
208void DP::Ph1::PiLine::mnaTearApplyVoltageStamp(Matrix &voltageVector) {
209 mSubSeriesInductor->mnaTearApplyVoltageStamp(voltageVector);
212void DP::Ph1::PiLine::mnaTearPostStep(Complex voltage, Complex current) {
213 mSubSeriesInductor->mnaTearPostStep(voltage - current * **mSeriesRes,
const Attribute< Real >::Ptr mParallelCap
Capacitance in parallel to the line [F].
const Attribute< Real >::Ptr mParallelCond
Conductance in parallel to the line [S].
const Attribute< Real >::Ptr mSeriesInd
Inductance along the line [H].
const Attribute< Real >::Ptr mSeriesRes
Resistance along the line [ohms].
void addMNASubComponent(typename SimPowerComp< Complex >::Ptr subc, MNA_SUBCOMP_TASK_ORDER preStepOrder, MNA_SUBCOMP_TASK_ORDER postStepOrder, Bool contributeToRightVector)
CompositePowerComp(String uid, String name, Bool hasPreStep, Bool hasPostStep, Logger::Level logLevel)
void mnaParentPreStep(Real time, Int timeStepCount) override
MNA pre and post step operations.
std::shared_ptr< Capacitor > mSubParallelCapacitor1
Parallel capacitor submodel at Terminal 1.
SimPowerComp< Complex >::Ptr clone(String copySuffix) override
DEPRECATED: Remove method.
void mnaCompUpdateCurrent(const Matrix &leftVector) override
Updates internal current variable of the component.
std::shared_ptr< Resistor > mSubParallelResistor1
Parallel resistor submodel at Terminal 1.
std::shared_ptr< Resistor > mSubSeriesResistor
Series Resistor submodel.
void initializeFromNodesAndTerminals(Real frequency) override
Initializes component from power flow data.
std::shared_ptr< Inductor > mSubSeriesInductor
Series Inductance submodel.
PiLine(String uid, String name, Logger::Level logLevel=Logger::Level::off)
Defines UID, name and logging level.
std::shared_ptr< Resistor > mSubParallelResistor0
Parallel Resistor submodel at Terminal 0.
void mnaParentAddPreStepDependencies(AttributeBase::List &prevStepDependencies, AttributeBase::List &attributeDependencies, AttributeBase::List &modifiedAttributes) override
add MNA pre and post step dependencies
void mnaCompUpdateVoltage(const Matrix &leftVector) override
Updates internal voltage variable of the component.
const Attribute< String >::Ptr mName
Human readable name.
String uid()
Returns unique id.
String type()
Get component type (cross-platform)
AttributeList::Ptr mAttributes
Attribute List.
Attribute< Matrix >::Ptr mRightVector
void mnaApplyRightSideVectorStamp(Matrix &rightVector) final
const Attribute< MatrixVar< Complex > >::Ptr mIntfCurrent
SimTerminal< Complex >::List mTerminals
const Attribute< MatrixVar< Complex > >::Ptr mIntfVoltage
SimNode< Complex >::List mVirtualNodes
Logger::Level mLogLevel
Component logger control for internal variables.
Logger::Log mSLog
Component logger.